Modern electronic equipment, such as televisions, telephones, radios, and computers are generally constructed of solid-state devices. Solid-state devices include transistors, capacitors, resistors, and other semiconductor devices. Typically, such devices are fabricated on a substrate and interconnected to form memory arrays, logic structures, timers, and other components of an integrated circuit. One type of memory array is a static random access memory (SRAM) device, in which memory cells are continuously available for reading and writing data. As technology improves, SRAM cells and other components are fabricated at smaller sizes and with greater on-chip integration.
The increasing level of on-chip integration has allowed steady improvements in modern microprocessor performance, but has also resulted in high energy dissipation in integrated circuits. In complementary metal-oxide-semiconductor (CMOS) circuits, which are often included within SRAMs, transistor threshold voltages have been reduced, along with supply voltages, as the technology is scaled. However, decreasing the transistor threshold voltage typically increases the amount of “static” or “leakage” power dissipated by the CMOS circuit. As transistor threshold voltages continue to be reduced in emerging technologies, leakage power is becoming a sizable percentage of the total power consumed in CMOS circuits.
Knowing that the CMOS circuits may include various disadvantageous characteristics, such as the aforementioned leakage power, the industry generally desires to characterize or quantify the circuit properties before going into large scale production thereof. Such is often the case with SRAM devices. Interestingly, the characteristics of the transistors in the SRAM devices tend to be dependent on the exact environment they will ultimately be included within. For example, a transistor having a given width and length would not exhibit the same characteristics if it were isolated by itself as compared to if it were located within a high density array. Correspondingly, the industry desires to characterize the transistors of the SRAM devices in an environment similar to the high-density array environment it will ultimately be included within.
Accordingly, what is needed in the art is a method for accurately characterizing the transistors of a transistor array while the transistors are in their standard environment, and a testing circuit for accomplishing the same.